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1 LT1360 50mhz, 800v/ m s op amp n wideband amplifiers n buffers n active filters n video and rf amplification n cable drivers n data acquisition systems n 50mhz gain bandwidth n 800v/ m s slew rate n 5ma maximum supply current n 9nv/ ? hz input noise voltage n unity-gain stable n c-load tm op amp drives all capacitive loads n 1mv maximum input offset voltage n 1 m a maximum input bias current n 250na maximum input offset current n 13v minimum output swing into 500 w n 3.2v minimum output swing into 150 w n 4.5v/mv minimum dc gain, r l =1k n 60ns settling time to 0.1%, 10v step n 0.2% differential gain, a v =2, r l =150 w n 0.3 differential phase, a v =2, r l =150 w n specified at 2.5v, 5v, and 15v the LT1360 is a high speed, very high slew rate opera- tional amplifier with excellent dc performance. the LT1360 features reduced supply current, lower input offset volt- age, lower input bias current and higher dc gain than devices with comparable bandwidth. the circuit topology is a voltage feedback amplifier with the slewing character- istics of a current feedback amplifier. the amplifier is a single gain stage with outstanding settling characteristics which makes the circuit an ideal choice for data acquisition systems. the output drives a 500 w load to 13v with 15v supplies and a 150 w load to 3.2v on 5v supplies. the amplifier is also capable of driving any capacitive load which makes it useful in buffer or cable driver applications. the LT1360 is a member of a family of fast, high performance amplifiers using this unique topology and employing linear technology corporations advanced bipolar complementary processing. for dual and quad amplifier versions of the LT1360 see the lt1361/lt1362 data sheet. for 70mhz amplifiers with 6ma of supply current per amplifier see the lt1363 and lt1364/lt1365 data sheets. for lower supply current amplifiers with bandwidths of 12mhz and 25mhz see the lt1354 through lt1359 data sheets. singles, duals and quads of each amplifier are available. two op amp instrumentation amplifier 1360 ta01 v in trim r5 for gain trim r1 for common-mode rejection bw = 500khz r1 10k r2 1k r5 220 w r4 10k r3 1k v out + + + LT1360 LT1360 gain r r r r r r rr r = ? ? + ? ? ? ? + ? ? ? ? + + () ? ? = 4 3 1 1 2 2 1 3 4 23 5 102 a v = C1 large-signal response 1360 ta02 c-load is a trademark of linear technology corporation. applicatio s u typical applicatio u features descriptio u , ltc and lt are registered trademarks of linear technology corporation.
2 LT1360 symbol parameter conditions v supply min typ max units v os input offset voltage (note 4) 15v 0.3 1.0 mv 5v 0.3 1.0 mv 2.5v 0.4 1.2 mv i os input offset current 2.5v to 15v 80 250 na i b input bias current 2.5v to 15v 0.3 1.0 m a e n input noise voltage f = 10khz 2.5v to 15v 9 nv/ ? hz i n input noise current f = 10khz 2.5v to 15v 0.9 pa/ ? hz r in input resistance v cm = 12v 15v 20 50 m w input resistance differential 15v 5 m w c in input capacitance 15v 3 pf input voltage range + 15v 12.0 13.4 v 5v 2.5 3.4 v 2.5v 0.5 1.1 v input voltage range C 15v C13.2 C12.0 v 5v C3.2 C2.5 v 2.5v C0.9 C0.5 v cmrr common mode rejection ratio v cm = 12v 15v 86 92 db v cm = 2.5v 5v 79 84 db v cm = 0.5v 2.5v 68 74 db psrr power supply rejection ratio v s = 2.5v to 15v 93 105 db 8 7 6 5 4 3 2 1 null ?n +in v nc v out v + null top view n8 package, 8-lead pdip total supply voltage (v + to v ) ............................... 36v differential input voltage (transient only) (note 2)................................... 10v input voltage ............................................................ v s output short circuit duration (note 3) ............ indefinite absolute m axi m u m ratings w ww u operating temperature range (note 8) ...C40 c to 85 c specified temperature range (note 9) ....C40 c to 85 c maximum junction temperature (see below) plastic package ................................................ 150 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c package/order i n for m atio n w u u LT1360cn8 order part number order part number t a = 25 c, v cm = 0v unless otherwise noted. electrical characteristics 8 7 6 5 4 3 2 1 null ?n +in v nc v out v + null top view s8 package, 8-lead plastic so consult factory for industrial and military grade parts. t jmax = 150 c, q ja = 190 c/ w t jmax = 150 c, q ja = 130 c/ w LT1360cs8 s8 part marking 1360 (note 1)
3 LT1360 symbol parameter conditions v supply min typ max units t a = 25 c, v cm = 0v unless otherwise noted. electrical characteristics a vol large-signal voltage gain v out = 12v, r l = 1k 15v 4.5 9.0 v/mv v out = 10v, r l = 500 w 15v 3.0 6.5 v/mv v out = 2.5v, r l = 500 w 5v 3.0 6.4 v/mv v out = 2.5v, r l = 150 w 5v 1.5 4.2 v/mv v out = 1v, r l = 500 w 2.5v 2.5 5.2 v/mv v out output swing r l = 1k, v in = 40mv 15v 13.5 13.9 v r l = 500 w , v in = 40mv 15v 13.0 13.6 v r l = 500 w , v in = 40mv 5v 3.5 4.0 v r l = 150 w , v in = 40mv 5v 3.2 3.8 v r l = 500 w , v in = 40mv 2.5v 1.3 1.7 v i out output current v out = 13v 15v 26 34 ma v out = 3.2v 5v 21 29 ma i sc short-circuit current v out = 0v, v in = 3v 15v 40 54 ma sr slew rate a v = C2, (note 5) 15v 600 800 v/ m s 5v 250 350 v/ m s full power bandwidth 10v peak, (note 6) 15v 12.7 mhz 3v peak, (note 6) 5v 18.6 mhz gbw gain bandwidth f = 1mhz 15v 50 mhz 5v 37 mhz 2.5v 32 mhz t r , t f rise time, fall time a v = 1, 10%-90%, 0.1v 15v 3.1 ns 5v 4.3 ns overshoot a v = 1, 0.1v 15v 35 % 5v 27 % propagation delay 50% v in to 50% v out , 0.1v 15v 5.2 ns 5v 6.4 ns t s settling time 10v step, 0.1%, a v = C1 15v 60 ns 10v step, 0.01%, a v = C1 15v 90 ns 5v step, 0.1%, a v = C1 5v 65 ns differential gain f = 3.58mhz, a v = 2, r l = 150 w 15v 0.20 % 5v 0.20 % f = 3.58mhz, a v = 2, r l = 1k 15v 0.04 % 5v 0.02 % differential phase f = 3.58mhz, a v = 2, r l = 150 w 15v 0.40 deg 5v 0.30 deg f = 3.58mhz, a v = 2, r l = 1k 15v 0.07 deg 5v 0.26 deg r o output resistance a v = 1, f = 1mhz 15v 1.4 w i s supply current 15v 4.0 5.0 ma 5v 3.8 4.8 ma
4 LT1360 symbol parameter conditions v supply min typ max units v os input offset voltage (note 4) 15v l 1.5 mv 5v l 1.5 mv 2.5v l 1.7 mv input v os drift (note 7) 2.5v to 15v l 912 m v/ c i os input offset current 2.5v to 15v l 350 na i b input bias current 2.5v to 15v l 1.5 m a cmrr common mode rejection ratio v cm = 12v 15v l 84 db v cm = 2.5v 5v l 77 db v cm = 0.5v 2.5v l 66 db psrr power supply rejection ratio v s = 2.5v to 15v l 91 db a vol large-signal voltage gain v out = 12v, r l = 1k 15v l 3.6 v/mv v out = 10v, r l = 500 w 15v l 2.4 v/mv v out = 2.5v, r l = 500 w 5v l 2.4 v/mv v out = 2.5v, r l = 150 w 5v l 1.0 v/mv v out = 1v, r l = 500 w 2.5v l 2.0 v/mv v out output swing r l = 1k, v in = 40mv 15v l 13.4 v r l = 500 w , v in = 40mv 15v l 12.8 v r l = 500 w , v in = 40mv 5v l 3.4 v r l = 150 w , v in = 40mv 5v l 3.1 v r l = 500 w , v in = 40mv 2.5v l 1.2 v i out output current v out = 12.8v 15v l 25 ma v out = 3.1v 5v l 20 ma i sc short-circuit current v out = 0v, v in = 3v 15v l 32 ma sr slew rate a v = C2, (note 5) 15v l 475 v/ m s 5v l 185 v/ m s i s supply current 15v l 5.8 ma 5v l 5.6 ma electrical characteristics the l denotes the specifications which apply over the temperature range 0 c t a 70 c, v cm = 0v unless otherwise noted.
5 LT1360 note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: differential inputs of 10v are appropriate for transient operation only, such as during slewing. large, sustained differential inputs will cause excessive power dissipation and may damage the part. see input considerations in the applications information section of this data sheet for more details. note 3: a heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. note 4: input offset voltage is pulse tested and is exclusive of warm-up drift. note 5: slew rate is measured between 10v on the output with 6v input for 15v supplies and 2v on the output with 1.75v input for 5v supplies. symbol parameter conditions v supply min typ max units v os input offset voltage (note 4) 15v l 2.0 mv 5v l 2.0 mv 2.5v l 2.2 mv input v os drift (note 7) 2.5v to 15v l 912 m v/ c i os input offset current 2.5v to 15v l 400 na i b input bias current 2.5v to 15v l 1.8 m a cmrr common mode rejection ratio v cm = 12v 15v l 84 db v cm = 2.5v 5v l 77 db v cm = 0.5v 2.5v l 66 db psrr power supply rejection ratio v s = 2.5v to 15v l 90 db a vol large-signal voltage gain v out = 12v, r l = 1k 15v l 2.5 v/mv v out = 10v, r l = 500 w 15v l 1.5 v/mv v out = 2.5v, r l = 500 w 5v l 1.5 v/mv v out = 2.5v, r l = 150 w 5v l 0.6 v/mv v out = 1v, r l = 500 w 2.5v l 1.3 v/mv v out output swing r l = 1k w , v in = 40mv 15v l 13.4 v r l = 500 w , v in = 40mv 15v l 12.0 v r l = 500 w , v in = 40mv 5v l 3.4 v r l = 150 w , v in = 40mv 5v l 3.0 v r l = 500 w , v in = 40mv 2.5v l 1.2 v i out output current v out = 12.0v 15v l 24 ma v out = 3.0v 5v l 20 ma i sc short-circuit current v out = 0v, v in = 3v 15v l 30 ma sr slew rate a v = C2, (note 5) 15v l 450 v/ m s 5v l 175 v/ m s i s supply current 15v l 6.0 ma 5v l 5.8 ma note 6: full power bandwidth is calculated from the slew rate measurement: fpbw = sr/2 p v p . note 7: this parameter is not 100% tested. note 8: the LT1360c is guaranteed functional over the operating temperature range of C40 c to 85 c. note 9: the LT1360c is guaranteed to meet specified performance from 0 c to 70 c. the LT1360c is designed, characterized and expected to meet specified performance from C 40 c to 85 c, but is not tested or qa sampled at these temperatures. for guaranteed i-grade parts, consult the factory. electrical characteristics the l denotes the specifications which apply over the temperature range C40 c t a 85 c, v cm = 0v unless otherwise noted. (note 9)
6 LT1360 typical perfor m a n ce characteristics u w supply current vs supply voltage and temperature input common mode range vs supply voltage input bias current vs input common mode voltage supply voltage ( v) 1 supply current (ma) 3 2 6 5 4 10 5 01520 1360 g01 ?5 c 25 c 125 c input common mode voltage (v) 0 input bias current ( m a) 0.2 0.1 0.6 0.5 0.4 0.3 ?5 ?0 0 10 15 5 ? 1360 g03 v s = 15v t a = 25 c i b = ? ? i b + + i b 2 supply voltage ( v) v common mode range (v) 2.0 0.5 1.0 1.5 v + 1.0 0.5 2.0 1.5 10 5 01520 1360 g02 t a = 25 c d v os < 1mv input bias current vs temperature open-loop gain vs resistive load output voltage swing vs load current open-loop gain vs temperature output voltage swing vs supply voltage temperature ( c) 0 input bias current ( m a) 0.2 0.1 0.7 0.6 0.5 0.3 0.4 50 ?5 25 100 125 50 75 0 1360 g04 v s = 15v i b = ? ? i b + + i b 2 load resistance ( w ) 10 60 open-loop gain (db) 65 85 100 10k 1360 g06 75 70 1k 80 v s = 5v v s = 15v t a = 25 c frequency (hz) 10 1 input voltage noise (nv/ ? hz) 10 i n 100 0.1 input current noise (pa/ ? hz) 1 10 e n 1k 100 100k 10k 1360 g05 v s = 15v t a = 25 c a v = 101 r s = 100k input noise spectral density supply voltage ( v) v output voltage swing (v) 1 2 3 v + ? ? ? 10 5 01520 1360 g08 r l = 1k r l = 500 w r l = 500 w r l = 1k t a = 25 c output current (ma) v output voltage swing (v) 1.0 1.5 0.5 v + 0.5 1.0 1.5 2.0 2.0 50 40 ?0 30 40 50 01020 ?0 ?0 1360 g09 v s = 5v v in = 100mv 85 c 85 c 25 c 25 c ?0 c ?0 c temperature ( c) 72 open-loop gain (db) 74 73 81 80 79 78 76 75 77 50 ?5 25 100 125 50 75 0 1360 g07 r l = 1k v o = 12v v s = 15v
7 LT1360 typical perfor m a n ce characteristics u w output short-circuit current vs temperature gain bandwidth and phase margin vs temperature temperature ( c) 35 output short-circuit current (ma) 40 70 65 60 50 45 55 50 ?5 25 100 125 50 75 0 1360 g10 v s = 5v source sink temperature ( c) 30 gain bandwidth (mhz) 40 80 70 50 60 0 phase margin (deg) 5 10 50 45 35 40 20 25 15 30 50 ?5 25 100 125 50 75 0 1360 g16 phase margin v s = 5v gain bandwidth v s = 5v phase margin v s = 15v gain bandwidth v s = 15v output impedance vs frequency gain and phase vs frequency frequency (hz) 10k ?0 gain (db) 0 70 100k 100m 1360 g14 1m 30 40 10 20 10m 50 60 phase (deg) 120 40 60 0 20 80 100 v s = 15v v s = 5v v s = 5v gain v s = 15v phase t a = 25 c a v = ? r f = r g = 1k gain bandwidth and phase margin vs supply voltage supply voltage ( v) 30 gain bandwidth (mhz) 50 40 80 70 60 30 phase margin (deg) 38 34 50 48 44 40 36 32 46 42 10 5 01520 1360 g15 t a = 25 c phase margin gain bandwidth settling time vs output step (inverting) settling time (ns) ?0 output step (v) ? ? ? 10 8 6 4 ? 2 0 0 40 80 100 60 20 1360 g13 v s = 15v a v = ? r f = 1k c f = 3pf 10mv 10mv 1mv 1mv frequency (hz) 10k 0.01 output impedance ( w ) 0.1 100 100k 100m 1360 g11 1m 1 10m 10 a v = 100 a v = 10 a v = 1 v s = 15v t a = 25 c settling time (ns) ?0 output step (v) ? ? ? 10 8 6 4 ? 2 0 0 40 80 100 60 20 1360 g12 v s = 15v a v = 1 r l = 1k 10mv 10mv 1mv 1mv settling time vs output step (noninverting) frequency response vs supply voltage (a v = C1) frequency (hz) 100k ? gain (db) ? ? 5 1m 100m 1360 g18 1 ? 10m 3 ? 2 0 4 5v 15v 2.5v t a = 25 c a v = ? r f = r g = 1k frequency response vs supply voltage (a v = 1) frequency (hz) 100k ? gain (db) ? ? 5 1m 100m 1360 g17 1 ? 10m 3 ? 2 0 4 5v 15v 2.5v t a = 25 c a v = 1 r l = 1k
8 LT1360 typical perfor m a n ce characteristics u w frequency response vs capacitive load power supply rejection ratio vs frequency common mode rejection ratio vs frequency undistorted output swing vs frequency ( 5v) undistorted output swing vs frequency ( 15v) total harmonic distortion vs frequency frequency (hz) 1m ? voltage magnitude (db) ? ? 12 100m 1360 g19 4 0 10m 8 ? 6 2 10 v s = 15v t a = 25 c a v = ? c = 1000pf c = 500pf c = 100pf c = 50pf c = 0 frequency (hz) 0 power supply rejection ratio (db) 40 20 100 80 60 100k 1m 1k 10k 100 10m 100m 1360 g20 v s = 15v t a = 25 c +psrr psrr frequency (hz) 0 common-mode rejection ratio (db) 40 20 120 100 80 60 1k 100m 10m 1m 100k 10k 1360 g21 v s = 15v t a = 25 c supply voltage ( v) 0 slew rate (v/ m s) 600 400 200 2000 1800 1600 1400 1200 1000 800 015 10 5 1360 g22 t a = 25 c a v = ? r f = r g = 1k sr = sr + + sr 2 temperature ( c) 200 slew rate (v/ m s) 400 300 1000 900 800 500 600 700 50 ?5 25 100 125 50 75 0 1360 g23 sr + + sr sr = ? 2 v s = 5v v s = 15v a v = ? input level (v p-p ) 0 slew rate (v/ m s) 400 600 200 2000 1800 1600 1400 800 1200 1000 0 8 16 20 12 4 21018 14 6 1360 g24 t a = 25 c v s = 15v a v = ? r f = r g = 1k sr = sr + + sr 2 frequency (hz) 100k 1m 0 output voltage (v p-p ) 30 10m 1360 g26 15 5 10 25 20 a v = ? a v = 1 v s = 15v r l = 1k a v = 1, 1% max distortion a v = ?, 2% max distortion frequency (hz) 10 0.0001 total harmonic distortion (%) 0.01 100 100k 1360 g25 1k 0.001 10k a v = ? a v = 1 t a = 25 c v o = 3v rms r l = 500 w frequency (hz) 100k 1m 0 output voltage (v p-p ) 10 10m 1360 g27 6 2 4 8 a v = ? a v = 1 v s = 5v r l = 1k 2% max distortion slew rate vs input level slew rate vs temperature slew rate vs supply voltage
9 LT1360 typical perfor m a n ce characteristics u w 2nd and 3rd harmonic distortion vs frequency differential gain and phase vs supply voltage small-signal transient (a v = 1) small-signal transient (a v = C1, c l = 500pf) large-signal transient (a v = 1, c l = 10,000pf) large-signal transient (a v = C1) large-signal transient (a v = 1) small-signal transient (a v = C1) capacitive load handling supply voltage (v) 0.28 differential phase (deg) 0.36 0.32 0.40 differential gain (%) 0.50 0.25 0 10 5 15 1360 g29 differential gain differential phase a v = 2 r l = 150 w t a = 25 c capacitive load (f) 10p 0 overshoot (%) 100 1 m 1360 g30 1000p 0.01 m 50 100p 0.1 m a v = 1 a v = ? v s = 15v t a = 25 c frequency (hz) 100k 200k 400k ?0 ?0 ?0 ?0 ?0 ?0 harmonic distortion (db) ?0 10m 1360 g28 1m 2m 4m v s = 15v v o = 2v p-p r l = 500 w a v = 2 3rd harmonic 2nd harmonic 1360 ta31 1360 ta34 1360 ta32 1360 ta35 1360 ta33 1360 ta36
10 LT1360 applicatio n s i n for m atio n wu u u capacitive loading the LT1360 is stable with any capacitive load. this is accomplished by sensing the load induced output pole and adding compensation at the amplifier gain node. as the capacitive load increases, both the bandwidth and phase margin decrease so there will be peaking in the frequency domain and in the transient response as shown in the typical performance curves.the photo of the small- signal response with 500pf load shows 60% peaking. the large-signal response with a 10,000pf load shows the output slew rate being limited to 5v/ m s by the short-circuit current. coaxial cable can be driven directly, but for best pulse fidelity a resistor of value equal to the characteristic impedance of the cable (i.e., 75 w ) should be placed in series with the output. the other end of the cable should be terminated with the same value resistor to ground. cable driver frequency response frequency (mhz) 1 ? ? ? ? 0 gain (db) 2 100 1360 ai02 10 a v = 2 r f = r g = 500 w r l = 150 w v s = 10v v s = 5v v s = 2.5v v s = 15v + LT1360 510 w 75 w out 75 w in 510 w the LT1360 may be inserted directly into ad817, ad847, el2020, el2044, and lm6361 applications improving both dc and ac performance, provided that the nulling circuitry is removed. the suggested nulling circuit for the LT1360 is shown below. offset nulling 1360 ai01 6 7 v + v 4 8 1 2 10k 3 + LT1360 layout and passive components the LT1360 amplifier is easy to apply and tolerant of less than ideal layouts. for maximum performance (for ex- ample fast settling time) use a ground plane, short lead lengths, and rf-quality bypass capacitors (0.01 m f to 0.1 m f). for high drive current applications use low esr bypass capacitors (1 m f to 10 m f tantalum). sockets should be avoided when maximum frequency perfor- mance is required, although low profile sockets can provide reasonable performance up to 50mhz. for more details see design note 50. the parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can cause peaking or oscillations. for feedback resistors greater than 5kw, a parallel capacitor of value c f > r g x c in /r f should be used to cancel the input pole and optimize dynamic performance. for unity-gain applications where a large feedback resistor is used, c f should be greater than or equal to c in .
11 LT1360 input considerations each of the LT1360 inputs is the base of an npn and a pnp transistor whose base currents are of opposite polarity and provide first-order bias current cancellation. because of variation in the matching of npn and pnp beta, the polarity of the input bias current can be positive or nega- tive. the offset current does not depend on npn/pnp beta matching and is well controlled. the use of balanced source resistance at each input is recommended for applications where dc accuracy must be maximized. the inputs can withstand transient differential input volt- ages up to 10v without damage and need no clamping or source resistance for protection. differential inputs, how- ever, generate large supply currents (tens of ma) as required for high slew rates. if the device is used with sustained differential inputs, the average supply current will increase, excessive power dissipation will result and the part may be damaged. the part should not be used as a comparator, peak detector or other open-loop applica- tion with large, sustained differential inputs . under normal, closed-loop operation, an increase of power dis- sipation is only noticeable in applications with large slewing outputs and is proportional to the magnitude of the differential input voltage and the percent of the time that the inputs are apart. measure the average supply current for the application in order to calculate the power dissipa- tion. applicatio n s i n for m atio n wu u u power dissipation the LT1360 combines high speed and large output drive in a small package. because of the wide supply voltage range, it is possible to exceed the maximum junction temperature under certain conditions. maximum junction temperature (t j ) is calculated from the ambient tempera- ture (t a ) and power dissipation (p d ) as follows: LT1360cn8: t j = t a + (p d x 130 c/w) LT1360cs8: t j = t a + (p d x 190 c/w) worst case power dissipation occurs at the maximum supply current and when the output voltage is at 1/2 of either supply voltage (or the maximum swing if less than 1/2 supply voltage). therefore p dmax is: p dmax = (v + C v C )(i smax ) + (v + /2) 2 /r l example: LT1360cs8 at 70 c, v s = 15v, r l = 250w p dmax = (30v)(5.8ma) + (7.5v) 2 /250w = 399mw t jmax = 70 c + (399mw)(190 c/w) = 146 c
12 LT1360 circuit operation the LT1360 circuit topology is a true voltage feedback amplifier that has the slewing behavior of a current feed- back amplifier. the operation of the circuit can be under- stood by referring to the simplified schematic. the inputs are buffered by complementary npn and pnp emitter followers which drive a 500 w resistor. the input voltage appears across the resistor generating currents which are mirrored into the high impedance node. complementary followers form an output stage which buffers the gain node from the load. the bandwidth is set by the input resistor and the capacitance on the high impedance node. the slew rate is determined by the current available to charge the gain node capacitance. this current is the differential input voltage divided by r1, so the slew rate is proportional to the input. highest slew rates are therefore seen in the lowest gain configurations. for example, a 10v output step in a gain of 10 has only a 1v input step, whereas the same output step in unity gain has a 10 times greater input step. the curve of slew rate vs input level illustrates this relationship. the LT1360 is tested for slew rate in a gain of C2 so higher slew rates can be expected in gains of 1 and C1, and lower slew rates in higher gain configurations. the rc network across the output stage is bootstrapped when the amplifier is driving a light or moderate load and has no effect under normal operation. when driving a capacitive load (or a low value resistive load) the network is incompletely bootstrapped and adds to the compensa- tion at the high impedance node. the added capacitance slows down the amplifier which improves the phase margin by moving the unity-gain frequency away from the pole formed by the output impedance and the capacitive load. the zero created by the rc combination adds phase to ensure that even for very large load capacitances, the total phase lag can never exceed 180 degrees (zero phase margin) and the amplifier remains stable. comparison to current feedback amplifiers the LT1360 enjoys the high slew rates of current feed- back amplifiers (cfas) while maintaining the characteris- tics of a true voltage feedback amplifier. the primary differences are that the LT1360 has two high impedance inputs and its closed loop bandwidth decreases as the gain increases. cfas have a low impedance inverting input and maintain relatively constant bandwidth with increasing gain. the LT1360 can be used in all traditional op amp configurations including integrators and applications such as photodiode amplifiers and i-to-v converters where there may be significant capacitance on the inverting input. the frequency compensation is internal and not dependent on the value of the feedback resistor. for cfas, the feedback resistance is fixed for a given bandwidth and capacitance on the inverting input can cause peaking or oscillations. the slew rate of the LT1360 in noninverting gain configurations is also superior in most cases. applicatio n s i n for m atio n wu u u
13 LT1360 1360 ss01 out +in ?n v + v r1 500 w c c r c c sche atic w w si plified
14 LT1360 dimension in inches (millimeters) unless otherwise noted. package descriptio n u n8 1098 0.100 (2.54) bsc 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.130 0.005 (3.302 0.127) 0.020 (0.508) min 0.018 0.003 (0.457 0.076) 0.125 (3.175) min 12 3 4 87 6 5 0.255 0.015* (6.477 0.381) 0.400* (10.160) max 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) n8 package 8-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510)
15 LT1360 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dimension in inches (millimeters) unless otherwise noted. package descriptio n u 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610)
16 LT1360 1360fa lt/tp 0400 2k rev a ? printed in usa ? linear technology corporation 1994 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com typical applicatio n s u photodiode preamp with ac coupling loop 1mhz, 4th order butterworth filter 1360 ta04 v in 1.1k 2.21k 22pf 909 w 47pf 470pf v out + + 1.1k 2.67k 909 w 220pf LT1360 LT1360 1360 ta03 ?v 1pf 10k sfh205 i pd 5v 100khz, 5.5mhz v s = f ?db = + + 1n5712 1n5712 10k 300pf 10k 2k v out 1 m f 5.1k + 2k 1/2 lt1358 1/2 lt1358 LT1360 related parts part number description comments lt1361/lt1362 dual and quad 50mhz, 800v/ m s op amps dual and quad versions of LT1360 lt1363 70mhz, 1000v/ m s op amp faster version of LT1360, v os = 1.5mv, i s = 6.3ma lt1357 25mhz, 600v/ m s op amp lower power version of LT1360, v os = 0.6mv, i s = 2ma lt1812 100mhz, 750v/ m s op amp low voltage, low power LT1360, v os = 1mv, i s = 3ma

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